A helpful feature that I am looking to add to my 286 system is onboard flash ROM updates, where I do not need to remove the flash ROMs to program them. In this post, I will share progress updates on this feature as I work to implement it.
The Plan
Updated PSoC Logic
As I was testing out the above logic in the PSoC, I was finding that the output of the D Flip Flop was not quite what I was expecting. My first thought is that the issue is related to the NET_IOWC signal and/or timing of that signal. Regardless, I decided to forego the register and extra logic in the PSoC and rely on the software data protection feature of the flash memory.
In the following video, I add support to copy my ROM into RAM, erase the flash ROM, and write data to the flash ROM.
Current working code from the video above: x86/286-related/WorkingCode/shadow_rom_erase_write_20230221 at main · rehsd/x86 · GitHub.
I had a bug in the code I showed in the video above. I was actually transferring twice the number of bytes needed. After correcting the bug, the transfer from the PC to the Nano is now ~19 seconds.
After adding a serial EEPROM to the Nano and updating the Nano code to write to the serial EEPROM, the total time to transfer the BIOS ROM data from the PC to the cache on the Nano was over 20 minutes. Ouch. So, changing plans...
YouTube user pvc had a great question of the approach in the above video and its impact to the flash lifetime. I made some adjustments that should lessen the concern of causing failures of the flash memory.
The code I used in the last video above is available here: x86/286-related/WorkingCode/20230302 at main · rehsd/x86 (github.com).
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